Efficient Linearisation of Sigma-Delta Modulators using Single-Bit Dither

Sigma-delta modulation, where a single-bit quantiser is embedded within a negative feedback loop (Fig. 1), is now a commonly-used technique for implementing high-resolution analogue-to-digital and digital-toanalogue converters (DACs), principally because of a favourable insensitivity to component tolerancing [1]. Single-bit quantisation generates relatively high levels of quantisation noise, hence high resolution is achieved by oversampling and noise-shaping quantisation error away from the signal band. Loop filter H determines the noise-shaping characteristic of the modulator.